[IA64] Fix I&D cache incoherency after vcpu migration

[IA64] Fix I&D cache incoherency after vcpu migration

Windows on HVM ocasionally crashes with BSOD especially on boot time.
I finally found out the cause is PAL_CACHE_FLUSH(cache_type=4).
The cache_type means an argument of PAL_CACHE_FLUSH and cache_type=4
makes local instruction caches coherent with the data caches.
See SDM vol2 11.10.3, PAL_CACHE_FLUSH.
FYI, Linux never uses cache_type=4.

Currently PAL_CACHE_FLUSH is called on only local cpu and caches on the
other cpus are still incoherent.

Attached patch does:
- When cache_type=1,2,3 that means flushing caches on local cpus,
  caches on the other cpus becomes to be flushed also.
  It might be overkill and not efficient. But I think it's permissive
  since these cache_type are seldom used.

- When cache_type=4, the actual PAL call to the other cpus is deferred
  until the vcpu migration occurs or the cpu becomes idle.
  Since Windows uses cache_type=4 quite often and many vcpus on SMP
  environment call PAL_CACHE_FLUSH simultaneously.

Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>